PeRT3 Phoenix System

PeRT3 Phoenix is a new addition to PeRT3 family of products designed to address PCIE Gen3 test requirements. In order to meet the increasingly complex designs of today's serial data receivers, PeRT3 Phoenix expands the bit rate range up to 8.5Gbps and offers new signal stress sources and built-in 3 tap de-emphasis control to address new serial data standards. At the same time, PeRT3 Phoenix continues to focus on protocol awareness to meet the need to communicate with the Device Under Test (DUT) into proper test modes and train the DUT's receiver equalization setting prior to performing receiver jitter tolerance testing.

Explore PeRT3 Phoenix System Explore PeRT3 Phoenix System

PeRT3 Test Suite Options

SAS-R006-004-A
Eagle SAS Receiver Test Suite
SAT-R006-004-A
Eagle SATA Receiver Test Suite
USB-R006-001-A
Eagle USB 3.0 Receiver Test Suite
PCI-R008-004-A
PCI Express Gen 1 / Gen 2 / Gen 3 Receiver Tolerance Test Suite
PCI-R008-4U4-A
Upgrade - PCI Express Gen 1 / Gen 2 / Gen 3 Receiver Tolerance Test Suite

PeRT3 Hardware Platforms

PER-R008-001-X
PeRT3 Phoenix R8 Platform
PER-R008-1U1-X
Upgrade – Eagle to Phoenix
PER-R008-004-A
Multi unit synchronization for Phoenix

PeRT3 Accessories

PER-AC12-C01-X
SMA to SMA pair High Quality
PER-AC12-M01-X
SMA to SMP pair
PER-AC06-P01-X
SATA ISI Board
PER-AC06-Q01-X
Rise Time Filters

Annual Calibration of PeRT3 Systems

PER-CA08-001-C
Annual Calibration of PeRT3 Phoenix System

Bundled Warranty and Calibration of PeRT3 Systems

PER-CA08-W01-W
Three Year Warranty and Two Additional Years Calibration for 1 Channel System
PER-CA08-WX1-W
Five Year Warranty and Four Additional Years Calibration for 1 Channel System

Serial Data Test Fixtures

TF-SATA-C
SATA Compliance Test Fixture (*WavePro 7 Zi and WaveMaster 8 Zi class oscilloscopes require the SDA II software option; **20M memory required)
Complete Compliance Test Environment

Receiver testing will be a critical area for PCI Express Gen3 Compliance. PeRT3 Phoenix is designed to test the receiver under conditions of proper equalization training, by performing loopback initialization and by introducing different stress types. Because the system combines protocol awareness with complete stress jitter profile, PeRT3 Phoenix has revolutionized the receiver testing architecture and is helping to define the PCI Express Gen3 compliance testing methodology.

Complete Characterization in Development

The biggest challenge for receiver compliance testing for PCI Express Gen3 is how the receiver performs dynamic equalization training of both the receiver equalization parameters and the proper selection of transmitter equalization presets. PeRT3 Phoenix can generate both 8b/10b and 128b/130b encoded data to establish Gen3 connectivity, and can perform transmitter equalization preset negotiation while the receiver optimizes the receiver equalization parameters. At the same time, PeRT3 Phoenix satisfies the 500ns timing requirement for preset response and thus makes this instrument the perfect tool for validation and characterization of the dynamic equalization design.

Calibrating the Jitter Output of the Phoenix

Receiver test specifications require calibration of the jitter output sources for the test instrument. When using the PeRT3 Phoenix in conjunction with SDA 8 Zi oscilloscope, this calibration process can be fully automated.

Generator Data Out     Generator Jitter Stress
Bit Rate 1 Gb/s to 8.5 Gb/s Random Jitter Source
Step Size 100Khz 10 Khz – 1.5Mhz RMS Jitter 1.2 – 9 pSec RMA
Rise/Fall Time (20-80%) 35 pSec typical 1.5 Mhz- 100Mhz RMA Jitter 1.2 – 12 pSec RMS
Differential Amplitude Range 50mV to 2.2V, 5mV steps 1.5 Mhz – 1000Mhz RMS Jitter 1.2 – 12 pSec RMS
Voltage Offset -2V to +2V Sinusoidal Jitter Source
Intrinsic Jitter 12 pSec pp typical with internal clock 10 Khz- 100Khz Jitter 100 – 15000 pSec
De-Emphasis   100Khz – 500Khz Jitter 100 – 2000 pSec
# taps 3 0.5 Mhz – 1000Mhz Jitter 0 – 300 pSec
Range -0.5dB to -9dB Common Mode Source
Step 0.1dB 100Mhz – 1000Mhz Jitter 50 – 350 mV
SSC Support 23Khz-33Khz   Sinusoidal waveform
  -5000ppm to +5000ppm Differential Mode Source
  Triangular/Sinusoidal waveforms 100Mhz – 2500Mhz Jitter 0 – 30 mV
Connector: K-Type female   Sinusoidal waveform
Interface Differential or single-ended, DC coupled, 50 ohm External Jitter Injection
Single error inject: Adds single error on demand Frequency range 0.5 ~ 100 Mhz
Generator Clock Out Modulation range 1 ~ 200 pSec
Clock Rate At rate divided by any integer between 1-255 Input impedance 50 ohms
Duty cycle 40-60% Amplitude range 60-600 mV
Amplitude 0.1 Vpp-Diff to 2Vpp-Diff Interface DC coupled, 50 ohms
Output voltage window -2V-2V Connector SMA female
Interface Differential or single-ended, DC coupled, 50 ohm Data In
Connector SMA female Data Rates 1 Gb/s to 8.5Gb/s
    Input impedance 50ohms
Protocol Supported Amplitude range 200 – 1800 mV
PCI Express 2.5, 5 and 8 Gb/s Clock In
SAS 1.5, 3 and 6 Gb/s Frequency range 1 Ghz to 8.5 Ghz
SATA 1.5, 3 and 6 Gb/s Termination 50 ohms
USB3.0 5Gb/s Amplitude range 600 – 1200 mV
  Tigger Out
Amplitude range 600 – 800 mV
ISI External
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